讲座题目：History of soft-error research in electronic deices and systems and possible mitigation techniques in the ground, avionics and space applications
主 讲 人： Eishi Hidefumi Ibe博士
主 持 人：龚敏 教授
讲座时间：2017年5月19日(周五）10：00
讲座地点：beat365在线登录平台望江校区2教201教室
主  办：物理科学与技术学院

Soft-error in memory devices induced by alpha particles emerging from impurities in package materials is first found in DRAMs in 1979 by May, et al.  By intensive efforts to improve purity, shielding of alpha rays and confinement of charge produced along with the tracks of alpha rays, soft-errors in DRAMs seemed to be overcome in 1980s.

As scaling of semiconductor devices nosedives down to 180nm, terrestrial neutron-induced soft-error becomes major threat of reliability of semiconductor devices and electronic systems at the ground and avionics, such as supercomputers, data centers, automobiles, and so on.

Compared to alpha-ray induced  soft-errors, secondary ions produced by nuclear reaction in semiconductor materials have high energy so that the situations become much more complicated:
1)Multi-cell upset (MCU. Simultaneous hits in multiple bits by a single event.) is growing major mode as scaling proceeds.
2)B-10 Impurities in package can produce alpha and Li particles by reacting with low-energy neutrons including thermal neutrons (25meV) be threat due to special manufacturing  processes like BPSG and plasma process where BF or BH gases are used.

It has been demonstrated that soft-errors (even MCUs) in SRAMs can be overcome by combination of interleaving and ECC.
However, interleaving and ECC are difficult for logic circuits to apply and much more complicated mitigation techniques are necessary and has to be established.
Furthermore, although permanent destructive failure modes like SEGR(Single Event Gate Rupture) and SEB (Single Event Burnout) have been major concerns only in space applications, they are becoming obvious threat in the ground applications.
The situations from around 1990s are reviewed in the tutorial. The current movements in relevant international standardizations will also be introduced.

Eishi Hidefumi Ibe博士，电气和电子工程师协会（IEEE）会员，1975年获东京大学学士学位，1985年获大阪大学博士学位，1975年加入日立有限公司原子能研究实验室，2017年创建Exapalette, LLC公司并担任CEO，1986年及1990年获日本原子能学会奖，1996年获美国核子学会奖，2015年获日本山崎-悌一半导体科学技术奖。Eishi Hidefumi Ibe博士在核工程方面取得了卓越的成就，对材料的辐照相应，半导体器件和电子系统的单粒子效应有20多年的研究经验，研究方向包括基本粒子和宇宙射线物理学、核、中子物理、半导体物理、数学和计算技术，离子注入/混合和加速器技术、电化学、数据库处理、卢瑟福背散射/俄歇/扫描电镜/激光束微分析等等。

在过去的20年中，Eishi Hidefumi Ibe博士致力于电子设备和元件中地面中子软错误的量化和消除工作，开发了全新的CMOS器件软错误模型，应用于半导体存储器件和逻辑门的可靠性设计工作中带来了对中子错误性质研究的突破性进展。对单粒子事件效应的研究有深厚的经验，应邀审阅过来自会议和期刊的超过200份技术文献。长期担任EDS和TNS等IEEE期刊的审稿人，参与IRPS, IOLTS, ICICDT, WDSN, NSREC, RADECS, RASEDA, ICITA和SELSE等会议，撰写了超过100个国际技术论文和演示文稿，撰写的书籍在世界科学出版社（2008），施普林格出版社（2010，2011）和威利（世界各地的出版物）出版。